Photolithographic techniques are used to form various IC structures on a wafer. In photolithography, desired circuit layouts on photomasks are optically transferred onto wafers through masking, exposure and development processes. Unfortunately, optical proximity effects, along with mask pattern fidelity and photoresist processing limitations commonly lead to a mismatch between the desired pattern and the actual result on the wafer.
To improve image fidelity, resolution enhancement techniques (RET) such as optical proximity correction (OPC) models have been introduced. The object of OPC is to make systematic modifications to mask geometry to compensate for systematic and stable errors. However, as technology progresses to smaller ground rules, traditional OPC techniques models are becoming less effective. Manufacturing yield can be negatively impacted as a result.
From the foregoing discussion, it is desirable to provide effective OPC systems and techniques.